TAPE 01
DEVELOPMENT PREVIEWtape 01 brings algorithmic synthesis and captured stereo transformation into a cassette-format instrument. two spool controls shape time and structure; drive and state handle transport and the computational register. the current industrial direction is smoked polycarbonate over an aluminum backplate.
sys 0 is the software-first launch. tape 01 remains in development: this preview presents design intent and host evidence. reservations, ordering, production dates, and finished-device validation are unavailable.
drag a spool vertically with a pointer or touch. use arrow keys for 1%, page keys for 10%, and home/end for the bounds. equivalent native controls follow. this preview is silent and does not alter the recorded samples.
bit 7 is leftmost: 11000000. bytebeat audio uses a calculation word, cellular audio uses its rule, and transform audio uses a bilateral peak ladder in the native engine. those audio words are not simulated here.
physical gesture model: tap under 300 ms toggles drive or steps the binary state. hold drive for a momentary brake. hold state freezes the mapped bias; after 300 ms, move bias at least 2.5% to preview a domain and release to select it. a 2 s state hold emits one preview commit request; it does not write flash. native timing uses audio frames; browser timing is illustrative.
THREE MUSICAL DOMAINS
00 // BYTEBEAT
aliased equation synthesis with stereo azimuth and magnetic filtering.
01 // CELLULAR FM
cellular wall events excite eight stereo fm voices.
02 // LIVE TRANSFORM
wet-only captured stereo history with reverse, freeze, wear, and bounded recursion.
these mappings describe the current native contract. they supersede older physical-specification ranges and unimplemented modifier gestures for this preview.
NATIVE SCENES // GESTURES AND TELEMETRYNATIVE LISTENING RECORD
three fixed demonstrations rendered offline by the current native stereo core. these are host renders, not tape 01 device recordings. the silent control preview does not change playback. each sample has 0.5 linear output attenuation; start listening at a low device volume.
00 // BYTEBEAT
OPEN SAMPLE FILE // WAVinput: no external input. fixed parameters; no automation or gestures in this sample.
recorded: 2026-10-08. method: offline 64-frame blocks; stereo pcm16. conditions: macos arm64 host; clang c++20; 48000 hz. revision: current core, bound to source hashes in the manifest.
01 // CELLULAR FM
OPEN SAMPLE FILE // WAVinput: no external input. fixed parameters; no automation or gestures in this sample.
recorded: 2026-10-08. method: offline 64-frame blocks; stereo pcm16. conditions: macos arm64 host; clang c++20; 48000 hz. revision: current core, bound to source hashes in the manifest.
02 // TRANSFORM
OPEN SAMPLE FILE // WAVinput: deterministic stereo sine; left 220 hz, right 330 hz, amplitude 0.25; wet-only output at +1x. fixed parameters; no automation or gestures in this sample.
recorded: 2026-10-08. method: offline 64-frame blocks; stereo pcm16. conditions: macos arm64 host; clang c++20; 48000 hz. revision: current core, bound to source hashes in the manifest.
FUNCTIONAL ARCHITECTURE
DEVICE DESIGN TARGET // TRANSPORT UNVERIFIED- STEREO IN
- PCM1860 ADC
- NATIVE DSP
- PCM5102A DAC
- HEADPHONE OUT
POWER
usb-c 5 v → power-path charging → 3.7 v / 600 mah cell → regulated rails.
SYNC / CONTROL
sync in 0–5 v → clock adapter → native controls → sync out 3.3 v. usb-midi → event adapter → domain and parameter registers.
text equivalent: stereo line input feeds the pcm1860 adc; the proposed rp2350a runs the native stereo core at a 48 khz target; pcm5102a conversion feeds the line/headphone output. power and sync are separate paths. codec transport, clock adapters, output driver, and board timing await device integration.
ARCHITECTURE TARGETS // SOURCE JSONEVIDENCE REGISTER
design targets and reported host results carry their own method, conditions, revision, and date. no entry establishes manufactured dimensions, battery life, device latency, or hardware timing.
DEVELOPMENT MILESTONES
01 // INDUSTRIAL DIRECTION
DESIGN TARGETsmoked polycarbonate, an aluminum backplate, five exposed fasteners, two 21.4 mm spools, and eight register elements define the current illustration.
MILESTONE SOURCE02 // SHARED SOUND ENGINE
REPORTED HOST VALIDATIONthe native record reports six passing test groups, sanitizer checks, and scripted offline renders. this is host evidence for the shared stereo core.
MILESTONE SOURCE03 // DEVICE ADAPTER
PENDINGcodec transport, pio/dma, worst-case timing, stack headroom, and flash persistence require the actual board. a commit mailbox does not prevent flash/xip stalls.
MILESTONE SOURCE04 // MECHANICAL RECONCILIATION
UNRESOLVEDchapter 11 lists layers totaling 10.4 mm while declaring an 8.6 mm stack. control ranges and extra modifier gestures also differ from the current native contract; the preview follows the native contract.
MILESTONE SOURCE05 // FINISHED-DEVICE READINESS
PENDINGbattery runtime, thermal behavior, audio performance, fit, and fabrication yield need device measurements. the 6–8 hour runtime in the design record is an unverified target.
MILESTONE SOURCE
ENGINEERING RECORDS
the docs and dispatches publish addressable engineering records. the links below serve exact source snapshots and listening metadata; each article records its publication date, revision and evidence boundary.